The AD9200ARSZ is a 10-bit complete CMOS monolithic Analog-to-digital Converter (ADC) with an on-chip sample-and-hold amplifier and voltage reference. The converter uses multistage differential pipeline architecture at 20MSPS data rates and guarantees no missing codes over the full operating temperature range. The input of the converter has been designed to ease the development of both imaging and communications systems. The user can select a variety of input ranges and offsets and can drive the input either single-ended or differentially. The sample-and-hold (SHA) amplifier is equally suited for both multiplexed systems that switch full-scale voltage levels in successive channels and sampling 1-channel inputs at frequencies up to and beyond the Nyquist rate. AC coupled input signals can be shifted to a predetermined level with an on board clamp circuit.
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