The AD9515BCPZ is a 2-output Clock Distribution IC emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this part. There are two independent clock outputs. One output is LVPECL, while the other output can be set to either LVDS or CMOS levels. The LVPECL output operates to 1.6GHz. The other output operates to 800MHz in LVDS mode and to 250MHz in CMOS mode. Each output has a programmable divider that can be set to divide by a selected set of integers ranging from 1 to 32. The phase of one clock output relative to the other clock output can be set by means of a divider phase select function that serves as a coarse timing adjustment. The LVDS/CMOS output features a delay element with three selectable full-scale delay values (1.5ns, 5ns and 10ns), each with 16 steps of fine adjustment.
- Phase select for coarse delay adjust
- Divide-by in range from 1 to 32
- Time delays up to 10ns
- Device configured with 4-level logic pins
- 1.6GHz Differential clock input
- 2 Programmable dividers
- 1.6GHz LVPECL clock output
无线, 传感与仪器, 时钟与计时
