CY8C3866AXI-040 - 

制造商：

CYPRESS SEMICONDUCTOR CYPRESS SEMICONDUCTOR

制造商产品编号：

CY8C3866AXI-040

仓库库存编号：

2063373

技术数据表：

(EN)

The CY8C3866AXI-040 is a 8-bit PSoC?3 true System-on-Chip Microcontroller Unit with memory, analog and digital peripheral functions. The CY8C38 family offers a modern method of signal acquisition, signal processing and control with high accuracy, high bandwidth and high flexibility. Analog capability spans the range from thermocouples to ultrasonic signals. The CY8C38 family can handle dozens of data acquisition channels and analog inputs on every general-purpose input/output GPIO pin. The CY8C38 family is also a high-performance configurable digital system with some part numbers including interfaces such as USB, multi master inter-integrated circuit (I2C) and controller area network (CAN). In addition to communication interfaces, the CY8C38 family has an easy to configure logic array, flexible routing to all I/O pins and a high-performance single cycle 8051 microprocessor core.

• Single cycle 8051 CPU
• Multiply and divide instructions
• 24-channel Direct memory access (DMA) with multilayer AHB bus access
• Any GPIO to any digital or analog peripheral routability
• LCD direct drive from any GPIO, up to 46 x 16 segments
• CapSense? support from any GPIO
• 1.2 to 5.5V I/O Interface voltages, up to four domains
• Maskable, independent IRQ on any pin or port
• Schmitt-trigger transistor-transistor logic (TTL) inputs
• All GPIO configurable as open drain high/low, pull-up/pull-down, High Z or strong output

• Configurable GPIO pin state at power-on reset (POR)
• 25mA Sink on SIO
• Full CAN 2.0b 16 Receiver, 8 Transmitter buffers
• USB 2.0 certified Full-Speed (FS) 12Mbps peripheral interface using internal oscillator
• 67MHz, 24-bit Fixed point digital filter block (DFB) to implement FIR and IIR filters
• Serial peripheral interface (SPI), universal asynchronous transmitter receiver (UART) and I2C
• Cyclic redundancy check (CRC)
• Pseudo random sequence (PRS) generator
• Local interconnect network (LIN) bus 2.0
• Quadrature decoder