The PIC24FJ64GA002-I/SP is a 16-bit 64kB general purpose Flash Microcontroller with a broad peripheral feature set and enhanced computational performance. The PIC24F family is pin-compatible with devices in the dsPIC33 family and shares some compatibility with the pinout schema for PIC18 and dsPIC30. This extends the ability of applications to grow from the relatively simple, to the powerful and complex, yet still selecting a Microchip device. The PIC24F CPU has a 16-bit (data) modified Harvard architecture with an enhanced instruction set. The Program Counter (PC) is 23-bit wide and addresses up to 4M instructions of user program memory space. A single-cycle instruction prefetch mechanism is used to help maintain throughput and provides predictable execution. All instructions execute in a single cycle, with the exception of instructions that change the program flow, the double-word move instruction and the table instructions.
CPU - Up to 16 MIPS performance, 16 x 16 hardware multiply and single cycle execution
System - On-chip LDO voltage regulator, JTAG boundary scan and flash memory program support
nanoWatt power managed modes - Run, idle and sleep modes
Analogue - 10-bit ADC, 16 channels and 500kSPS
Peripherals - 2 UART modules with LIN and IrDA? support, 4 deep FIFO, five 16-bit timer modules
Fail-safe clock monitor (FSCM) operation - Detects clock failure and switches to on-chip