The PCA9665PW is an Interface between most standard parallel-bus microcontrollers/microprocessors and the serial I2C-bus and allows the parallel bus system to communicate bidirectionally with the I2C-bus. It can operate as a master or a slave and can be a transmitter or receiver. Communication with the I2C-bus is carried out on a byte or buffered mode using interrupt or polled handshake. It controls all the I2C-bus specific sequences, protocol, arbitration and timing with no external timing element required. It contains eleven registers which are used to configure the operation of the device as well as to send and receive serial data. There are four registers that can be accessed directly and seven registers that are accessed indirectly by setting a register pointer. The four direct registers are selected by setting pins A0 and A1 to the appropriate logic levels before a read or write operation is executed on the parallel bus.
Both master and slave functions
Multi-master capability
Internal oscillator trimmed to 15% accuracy reduces external components
I2C-bus General call capability
Software reset on parallel bus
Standard-mode and fast-mode I2C-bus capable and compatible with SMBus
Latch-up testing is done to JEDEC standard JESD78 which exceeds 100mA
(EN)
