The AM26LS32ACD is a quadruple differential line receiver in 16 pin SOIC package. It is used for balanced and unbalanced digital data transmission. The enable function is common to all four receivers and offers choice of active high or active low input. The 3 state outputs permit connection directly to a bus organized system. Fail safe design ensures that, if inputs are open then outputs are always high. The AM26LS32A incorporates an additional stage of amplification to improve sensitivity. The input impedance has been increased resulting in less loading of bus line. The additional stage has increased propagation delay and this does not affect interchangeability in most applications.
Meet or exceed requirements of ANSI TIA/EIA-422-B, TIA/EIA-423-B, ITU recommendations V.10 and V.11
±7V common mode range with ±200mV sensitivity
Supply voltage range from 4.75V to 5.25V
Input hysteresis is 50mV
Low power schottky circuitry
Complementary output enable inputs
Input impedance of 15Kohm
Operate from single 5V supply
Designed to interchangeable with advanced micro devices AM26LS32 and AM26LS33
(EN)
