The SN65LVDS31PW is a high-speed differential Line Driver implements the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds and allow operation with a 3.3V supply rail. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 247mV into a 100R load when enabled. The intended application of this device and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100R. The transmission media may be printed-circuit board traces, backplanes or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.
Low-voltage TTL (LVTTL) logic input levels
Driver at high-impedance when disabled or with VCC=0
Pin-compatible with AM26LS31, MC3487 and μA9638
Cold sparing for space and high-reliability applications requiring redundancy
Low-voltage differential signaling with typical output voltage of 350mV and a 100R load
Typical output voltage rise and fall time of 500ps (400Mbps)
(EN)
