The TSW1266EVM is a wideband complex receiver reference design and evaluation platform that is ideally suited for use as a feedback receiver for transmitter digital predistortion. The EVM signal chain has a wideband complex demodulator, the LMH6521 dual channel, digitally controlled variable gain amplifier (DVGA) and the ADS5402 12bit 800MSPS ADC. The TSW1266EVM also includes the LMK04800 dual PLL clock jitter cleaner and generator to provide an onboard low noise clocking solution. The signal chain can be configured for a variety of frequency plans by modifying the onboard filter components. The gain of the LMH6521 DVGA can be controlled through the GUI or alternatively through the high speed connector with an FPGA. The EVM is designed to mate with the TSW1400EVM pattern capture and generation board to capture data from the ADC. Signal analysis can then be performed with the high speed data converter pro software tool.
- Allows for multiple clocking configurations
- Default RF frequency range from 1880MHz to 2390MHz
- LO frequency around 2600MHz
- Software GUI allows for configuring the ADS5402 and LMK04800
- SMA connectors
- Ultra low RMS jitter performance
- 3.15V to 3.45V operation
- Analog input buffer with High Impedance Input
- Data output interface: DDR LVDS
射频通信, 通信与网络, 通信与网络, 射频通信, 传感与仪器
(EN)
