The DS90CF363BMT/NOPB is a programmable LVDS Transmitter converts 21 bits of CMOS/TTL data into three LVDS (low voltage differential signalling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitted. At a transmit clock frequency of 65MHz, 18 bits of RGB data and 3 bits of LCD timing and control data (FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455Mbps per LVDS data channel. Using a 65MHz clock, the data throughput is 170Mbps. The DS90CF363B is fixed as a Falling edge strobe transmitter and will interoperate with a falling edge strobe receiver (DS90CF366) without any translation logic. This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interfaces.
No special start-up sequence required between clock/data and /PD pins
Input signal (clock and data) can be applied either before or after the device is powered
Support spread spectrum clocking up to 100kHz frequency modulation
Deviations of ±2.5% centre spread or -5% down spread
Best-in-class set and hold times on TxINPUTs
Tx power consumption of <130mW (typical) at 65MHz grayscale
40% Less power dissipation than BiCMOS alternatives
(EN)
