The DS90CR285MTD/NOPB is a rising edge data strobe LVDS Transmitter converts 28 bits of LVCMOS/LVTTL data into four LVDS (low voltage differential signalling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted. The multiplexing of the data lines provides a substantial cable reduction. Long distance parallel single-ended buses typically require a ground wire per active signal (and have very limited noise rejection capability). Thus, for a 28-bit wide data and one clock, up to 58 conductors are required. With the channel link chipset as few as 11 conductors (4 data pairs, 1 clock pair and a minimum of one ground) are needed.
Narrow bus reduces cable size
PLL requires no external components
Chipset (TX + RX) power consumption of <250mW (typical)